NeuralChip - Professional Chip Design Platform & Academy

Cell Hierarchy

cells: 8

tops: 1

Library JSON

{
  "libname": "CHIP",
  "version": 600,
  "units": {
    "userPerDb": 0.001,
    "metersPerDb": 1e-9
  },
  "structures": [
    {
      "name": "CHIP_TOP",
      "elements": [
        {
          "type": "sref",
          "sname": "CORE",
          "origin": {
            "x": 0,
            "y": 0
          }
        },
        {
          "type": "aref",
          "sname": "IO_PAD",
          "origin": {
            "x": 0,
            "y": 0
          },
          "cols": 8,
          "rows": 1,
          "rowVector": {
            "x": 0,
            "y": 0
          },
          "colVector": {
            "x": 100,
            "y": 0
          }
        }
      ]
    },
    {
      "name": "CORE",
      "elements": [
        {
          "type": "sref",
          "sname": "CPU",
          "origin": {
            "x": 0,
            "y": 0
          }
        },
        {
          "type": "sref",
          "sname": "CACHE",
          "origin": {
            "x": 200,
            "y": 0
          }
        },
        {
          "type": "sref",
          "sname": "CACHE",
          "origin": {
            "x": 400,
            "y": 0
          }
        }
      ]
    },
    {
      "name": "CPU",
      "elements": [
        {
          "type": "aref",
          "sname": "AND2_X1",
          "origin": {
            "x": 0,
            "y": 0
          },
          "cols": 50,
          "rows": 20,
          "rowVector": {
            "x": 0,
            "y": 10
          },
          "colVector": {
            "x": 5,
            "y": 0
          }
        },
        {
          "type": "aref",
          "sname": "DFF_X1",
          "origin": {
            "x": 0,
            "y": 0
          },
          "cols": 30,
          "rows": 10,
          "rowVector": {
            "x": 0,
            "y": 10
          },
          "colVector": {
            "x": 8,
            "y": 0
          }
        }
      ]
    },
    {
      "name": "CACHE",
      "elements": [
        {
          "type": "aref",
          "sname": "SRAM_BIT",
          "origin": {
            "x": 0,
            "y": 0
          },
          "cols": 64,
          "rows": 32,
          "rowVector": {
            "x": 0,
            "y": 1
          },
          "colVector": {
            "x": 1,
            "y": 0
          }
        }
      ]
    },
    {
      "name": "IO_PAD",
      "elements": [
        {
          "type": "boundary",
          "layer": 1,
          "datatype": 0,
          "points": [
            {
              "x": 0,
              "y": 0
            },
            {
              "x": 50,
              "y": 0
            },
            {
              "x": 50,
              "y": 50
            },
            {
              "x": 0,
              "y": 50
            },
            {
              "x": 0,
              "y": 0
            }
          ]
        }
      ]
    },
    {
      "name": "AND2_X1",
      "elements": [
        {
          "type": "boundary",
          "layer": 1,
          "datatype": 0,
          "points": [
            {
              "x": 0,
              "y": 0
            },
            {
              "x": 2,
              "y": 0
            },
            {
              "x": 2,
              "y": 2
            },
            {
              "x": 0,
              "y": 2
            },
            {
              "x": 0,
              "y": 0
            }
          ]
        }
      ]
    },
    {
      "name": "DFF_X1",
      "elements": [
        {
          "type": "boundary",
          "layer": 1,
          "datatype": 0,
          "points": [
            {
              "x": 0,
              "y": 0
            },
            {
              "x": 4,
              "y": 0
            },
            {
              "x": 4,
              "y": 2
            },
            {
              "x": 0,
              "y": 2
            },
            {
              "x": 0,
              "y": 0
            }
          ]
        }
      ]
    },
    {
      "name": "SRAM_BIT",
      "elements": [
        {
          "type": "boundary",
          "layer": 2,
          "datatype": 0,
          "points": [
            {
              "x": 0,
              "y": 0
            },
            {
              "x": 0.5,
              "y": 0
            },
            {
              "x": 0.5,
              "y": 0.5
            },
            {
              "x": 0,
              "y": 0.5
            },
            {
              "x": 0,
              "y": 0
            }
          ]
        }
      ]
    }
  ]
}

root:

Tree

CHIP_TOP

IO_PAD ×8

CORE

CACHE ×2

CPU

Stats

Click a cell.

Flattened instance counts under `CHIP_TOP`

Cell	Flattened count	Elements	Children
SRAM_BIT	4096	1	0
AND2_X1	1000	1	0
DFF_X1	300	1	0
IO_PAD	8	1	0
CACHE	2	1	1
CHIP_TOP	1	2	2
CORE	1	3	2
CPU	1	2	2

Cell Hierarchy

Library JSON

Tree

Stats

Flattened instance counts under CHIP_TOP

Flattened instance counts under `CHIP_TOP`